My main research interests are directed towards the development of algorithmic solutions for VLSI Physical Design Automation using mathematical programming and advanced search heuristics in the form of Tabu Search, Genetic Algorithms and GRASP. I am also interested in digital/VLSI design techniques, Computer Architectures and FPGA design geared towards reconfigurable computing. My other research areas include parallel processing, distributed simulation and machine learning.
- My Current Research Activities (PDF)
- Links to Machine Learning
- Links to Deep Learning
- Links to Cryptography
Physical Design Automation
This research activity addresses the problem of VLSI circuit layout. The research deals with the algorithms that are used inside VLSI design automation tools, also called computer-aided design (CAD) tools. VLSI stands for Very Large Scale Integration, which refers to those integrated circuits that contain more than 1 million transistors. The circuits designed may be general-purpose such as microprocessors and memories or application-specific integrated circuits (ASICs) which are designed for a narrow range of applications. Designing such a circuit is a difficult task. A first requirement is, of course, that a given specification is realized. Besides this, there are different entities that one would like to optimize. These entities can often be optimized simultaneously. The most important entities are: Area Minimization of the chip to increase the yield, Speed, Power dissipation, Design time and Testability.
- Researchers (CAD)
VLSI stands for “Very Large Scale Integration”. This is the field which involves packing more and more logic devices into smaller and smaller areas. VLSI circuits are everywhere … your computer, your car, your brand new state-of-the-art digital camera, the cell-phones, and what have you. Some of my research is motivated by the challenges of Deep-Submicron (DSM) integrated processes. These challenges stem from previously ignorable physical phenomena (signal propagation delay, mounting leakage currents, parameter variations, signal integrity), as well as the growing complexity of realizable VLSI systems. The DSM challenge is therefore a rich source of unsolved problems in low-power and high-performance computing.
- Researchers (VLSI)
- Researcher (Computer Architecture)
Reconfigurable Computing Systems
Reconfigurable Computing Systems are computers based on hardware, most of which can be arbitrarily defined to suit the needs of the particular problem to be solved. The goal of configurable computing is to achieve most of the performance of custom architectures while retaining most of the flexibility of general purpose computing. The main objective of this research activity is to design state of the art hardware accelerators to speedup the performance of combinatorial optimization heuristics and control algorithms based on Tabu Search, Genetic Algorithms, Neural Networks and Fuzzy Logic. Currently I am working on several advanced search heuristics for solving the VLSI circuit layout problem which require custom design hardware accelerators to obtain solutions in minimum CPU time. Some of the problems that can benefit from these advanced search techniques are graph partitioning, facility layout, global and detailed routing. The main idea is to divide the algorithm into sequentially executed stages. This process of “configure and execute” is repeated until the algorithm has completed its task.
- Researchers (RCS)
- Dr. Andy Ye (Ryerson University)
- Dr. Lev Kirischian (Ryerson University)
- Dr. Guy Lemieux (University of British Colombia)
- Dr. Witold Pedrycz (University of Alberta)
- Dr. Voicu Groza (University of Ottawa)
- Dr. Daler Rahkmatov (University of Victoria)
- Dr. Mihai Sima (University of Victoria)
- Dr. Stephen Brown (University of Toronto)
- Dr. Paul Chow (University of Toronto)
- RCS IN University of South Carolina
- RCS IN Ryerson University (Gul Khan)
Hardware/Software Co-Design for Embedded Systems
Embedded controllers for reactive real-time applications are implemented as mixed software-hardware systems. These controllers utilize Micro-processors, Micro-controllers and Digital Signal Processors but are neither used nor perceived as computer. Generally, software is used for features and flexibility, while hardware is used for performance. Design of embedded systems can be subject to many different types of constraints, including timing, size, weight, power consumption, reliability, and cost. Current methods for designing embedded systems require to specify and design hardware and software separately. The main research contributions to this area is developing a methodology for specification, automatic synthesis, and validation of this sub-class of embedded systems. Design is done in a unified framework, with a unified hardware-software representation, so as to prejudice neither hardware nor software implementation. Previous techniques developed for VLSI Circuit Partitioning are modified to accommodate the difficulty of combining components that exhibit different characteristics.
Algorithms and Meta Heuristic Based Techniques for Optimization
Combinatorial optimization study problems, which are characterized by a finite number of feasible solutions, abound in everyday life, particularly in engineering design. An important and widespread area of applications concerns the efficient use of scarce resources to increase productivity. Typical engineering design problems relate to set covering, bin packing, knapsack packing, quadratic assignment, minimum spanning tree determination, vehicle routing and scheduling, facility location and so on. Engineering optimization and advanced search heuristics in the form of Tabu Search, Simulated Annealing, Genetic Algorithms and GRASP are indispensable working tools for industrial engineers and designers, as well as systems analysts, operations researchers, and management scientists working in manufacturing and related industries.I have proposed several novel techniques to reduce the complexity of problems via clustering and partitioning and also hybrid approaches that were very effective in solving combinatorial optimization problems in general and circuit layout in particular.
- Researchers (Optimization)
DSP Based Application (Hearing Aids)
Due to the relentless improvement in silicon manufacturing technologies, the implementation of entire electronic systems on a single silicon chip is now a reality. Embedded systems and mobile devices (such as cellular telephones, audio-capable PDAs, and medical equipment such as hearing aids) are ubiquitous. These devices are often used in noisy environments such as cars, offices and public places. There is usually a reduction in the intelligibility and sound quality of these devices due to such noisy environment. Traditional design methods for noise reduction have focused on algorithm development followed by modifications for implementation on a general purpose digital signal processor (DSP). These DSPs are generally designed to optimize performance for a large class of signal processing applications. For high-performance embedded signal processing DSPs are very important, but, in some cases, DSPs alone cannot provide adequate amounts of computational power. Advancements in Field Programmable Gate Arrays (FPGAs) provide new options for DSP design engineers.